Cadence announced its ChipStack TM AI Super Agent, which represents a major breakthrough in semiconductor design automation, as it begins shipping what is believed to be the first agentic AI-based design and verification software as part of its front-end silicon design and verification flow.
Built to enhance productivity throughout the design lifecycle, the ChipStack AI Super Agent delivers up to 10× improvements in tasks such as coding design logic and testbenches, crafting comprehensive test plans, orchestrating regression testing, debugging, and automatically resolving issues.
“ChipStack represents a major leap in our design-for-AI and AI-for-design strategy, applying agentic AI directly to our customers’ front-end flows to tackle the growing complexity and scale of modern chips,” said Anirudh Devgan, president and CEO, Cadence. “By leveraging intelligent agents that autonomously call our underlying tools, we are enabling dramatic productivity gains for our customers in critical design and verification tasks while freeing scarce engineering talent to focus on innovation.”
The answer highlights Cadence’s overall Intelligent System Design strategy enabled by AI orchestration innovation in conjunction with top-notch system simulation capabilities and accelerated computing to propel the future innovation of semiconductors and systems. ChipStack brings together multiple virtual engineers that operate through Cadence’s core Electronic Design Automation portfolio.
To support diverse deployment needs, the ChipStack AI Super Agent is compatible with both cloud-based and on-premises models. It works with frontier AI technologies, including customizable open NVIDIA Nemotron models via NVIDIA NeMo, as well as cloud-hosted models such as OpenAI GPT, enabling chip designers to align AI workflows with specific organizational requirements.
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“Our customers are facing a significant senior deficit in the engineering talent needed to deliver on their product roadmaps,” said Paul Cunningham, vice president and general manager of Research and Development, Cadence. “Our ChipStack AI Super Agent is a game changer for design and verification productivity, and deployments are ramping fast.”
Major industry players are already deploying the technology in early access. Altera, NVIDIA, Qualcomm, and Tenstorrent have integrated ChipStack into their workflows, reporting measurable improvements in engineering efficiency and verification throughput.
“The Cadence ChipStack AI Super Agent has significantly reduced our verification effort in some areas by approximately 10X, enabling our team to achieve closure much more swiftly and confidently,” said Arvind Vidyarthi, senior director of engineering, Altera. “By pairing an interactive, engineer-in-the-loop experience with Cadence’s advanced AI-driven verification technologies, we are realizing step-function productivity gains and achieving deeper functional coverage on our most complex designs.”
“As semiconductor complexity continues to accelerate, AI has become essential to designing the next generation of chips,” said Timothy Costa, GM of Industrial and Computational Engineering, NVIDIA. “Our collaboration with Cadence, including innovations like the ChipStack AI Super Agent, demonstrates how combining intelligent reasoning capabilities such as Mental Models and automated formal test plan generation with NVIDIA accelerated computing can unlock new levels of productivity and efficiency for chip designers.”
“Qualcomm is pleased to collaborate with Cadence on the evaluation of the ChipStack AI Super Agent for a broad user base,” said Paul Penzes, vice president of engineering at Qualcomm. “Early results indicate strong, encouraging performance enhancements, and we look forward to realizing the productivity gains.”
“ChipStack greatly improved the efficiency of our formal verification efforts,” said Daniel Cummings, principal engineer of RISC-V Cores, Tenstorrent. “During a three-month evaluation on three critical design blocks, it reduced verification time by up to 4X. Running the agent on Tenstorrent hardware also demonstrated our ability to deliver the high-performance, on-prem inference needed for production-scale LLM workloads.”
