Questa One redefines integrated circuit (IC) verification from a reactive process into an intelligent, self-optimizing system
Siemens Digital Industries Software has unveiled the Questa™ One smart verification software portfolio, a groundbreaking solution that combines connectivity, data-driven techniques, scalability, and artificial intelligence (AI) to advance the Integrated Circuit (IC) verification process. By optimizing the workflow, Questa One aims to enhance the productivity of engineering teams, allowing them to overcome the challenges posed by increasingly complex designs.
Designed with scalability in mind, Questa One supports the largest and most intricate designs, from intellectual property (IP) to system-on-a-chip (SoC) to complete systems. It also incorporates cutting-edge technologies such as advanced 3D-ICs, chiplet-based architectures, and software-defined systems, all of which push the boundaries of IC verification.
Transforming the IC Design Process
“Questa One transforms the IC design process to address the verification productivity gap and solves the IC industry’s rapidly growing challenges associated with increasingly complex designs,” said Abhi Kolpekwar, Vice President & General Manager of Digital Verification Technologies at Siemens Digital Industries Software. “Questa One leverages new technical innovations to provide the fastest functional, fault, and formal verification engines available. However, our customers tell us that performance alone isn’t enough—they also need deeper connectivity across our unmatched verification, validation, and test workflows, which Questa One delivers. Powered by AI, Siemens’ verification solutions are driving unprecedented productivity gains in smart creation, regression, analysis, engine, and debug domains.”
Tackling the Verification Productivity Gap 2.0
Siemens collaborated with industry leaders to develop Questa One, a comprehensive solution that bridges the Verification Productivity Gap 2.0. This bottleneck results from the complexity of technologies like 3D-ICs, chiplet-based designs, and software-defined systems, all exacerbated by a talent shortage and the growing demands for enhanced security, reduced power consumption, reliability, and sustainability.
Key Features of Questa One Smart Verification Solution
Questa One integrates several technical advancements that deliver remarkable performance boosts:
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Questa One Coverage Acceleration Software: Achieves 50x faster coverage goals compared to traditional testbench solvers, combining faster coverage results with the power of Universal Verification Methodology (UVM) constrained random test generation.
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Questa One DFT Simulation Acceleration Software: Delivers 8x faster gate-level design-for-test (DFT) serial pattern simulations by leveraging Questa One Parallel Simulation and integrating seamlessly with the industry-leading Tessent™ Streaming Scan Network (SSN) architecture.
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Questa One Fault Simulation Acceleration Software: Boosts performance by 48x, supporting both functional safety and DFT fault simulation. It also uniquely supports the User Defined Fault Modeling (UDFM) feature in Tessent.
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Questa One Stimulus-Free Verification Software: This innovative software empowers engineers to significantly reduce processing times from over 24 hours to less than one minute for complex open-source SoC-level reference designs. The integration of 20 different stimulus-free analyses, AI, and automation provides solutions like auto-correction during linting and generative AI for SVA property creation and verification.
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Questa One Avery Verification IP Software: Based on Avery’s high-quality VIP and high-coverage Compliance Test Suites (CTS), it includes protocol-aware debug and coverage analytics to boost productivity. Accelerated VIP enables reuse of CTS, testbenches, and stimuli across Questa One Sim and Veloce CS emulation and prototyping systems.
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Three Core Principles of Questa One
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Connected Verification: Questa One forms a connected ecosystem for engineers, EDA tools, and verification IP, ensuring seamless verification, validation, and testing across Siemens’ tools, including Questa One, Tessent DFT, and Veloce CS systems.
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Data-Driven Verification: Utilizing AI-powered analytics, Questa One offers new insights, enabling engineers to improve verification productivity. Its machine learning technologies—generative, prescriptive, and predictive—help achieve optimal verification with minimal resources.
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Scalable Verification: With unparalleled acceleration and automation capabilities, Questa One ensures the fastest verification closure and the highest confidence in results.
Customer Experiences with Questa One
Karima Dridi, Head of Productivity Engineering at Arm, shared, “The Questa One Smart Verification Solution has significantly boosted our verification productivity across both on-premises and cloud deployments. As an early adopter of running large EDA workloads using the advanced Questa One Sim functional simulator, we’ve seen improvements in performance, cost-efficiency, and reduced regression time on our latest AArch64 architecture.”
Chienlin Huang, Senior Technical Manager of the Connectivity Technology Department at MediaTek, added, “Questa One has elevated our engineering productivity throughout the verification process, utilizing both formal verification and simulation technologies. Questa One Property Assist uses generative AI to save us weeks of engineering time, while Questa One Regression Navigator predicts which simulation tests are most likely to fail and runs them first, saving us valuable days of regression and debugging time.”
Selim Bilgin, Corporate Vice President of Silicon Engineering at Microsoft, noted, “Questa One DFT simulation has slashed our verification time from weeks to days, delivering remarkable performance improvements. On Microsoft’s Azure Cobalt 100 platform, we’ve seen up to a 20% performance boost, unlocking even greater efficiency for our EDA workloads.”
“Siemens’ Questa One has transformed our verification process, empowering us to tackle new-age data center workloads like generative AI with cutting-edge silicon IP solutions for PCIe, CXL, and HBM interfaces,” stated Susheel Tadikonda, Vice President of Engineering, Silicon IP at Rambus. “Leveraging the full suite of Questa One solutions—including simulation, static and formal analysis, and verification IP technologies—has given us increased confidence in the comprehensive verification of IP solutions for SoC and chiplet designs.”
This announcement marks a pivotal moment for the IC verification industry, as Siemens continues to lead the charge in providing innovative solutions that break through existing barriers and enable more efficient, accurate, and scalable design verification.
